LDO is a linear regulators. Linear regulators used in its linear area running transistors or FET, from application in excess of the input voltage, minus the voltage produced after adjusting the output voltage.
The so-called pressure drop voltage, refers to the output voltage stabilizer will maintain its ratings in the 100mV needed and within the input voltage output voltage difference with the minimum value.
Is the output voltage LDO (low pressure drop) regulators often use power transistors (also called transmission equipment) as a PNP. This kind of transistors allow saturated, so regulators can have a very low pressure drop, usually around 200mV voltage; By contrast, use of composite power transistor NPN transistors traditional linear regulators around the pressure drop for 2V. Negative output LDO use the transmission equipment as NPN transistors, its operation mode and is similar to the output LDO PNP device.
Updated development using CMOS power transistors, it can provide the lowest pressure drop voltage. Using CMOS, through the only voltage stabilizer pressure drop is power equipment load current caused ON resistance. If load is lesser, this way of pressure drop produced only a few dozen millvolts.